A one time programmable (OTP) memory is a nonvolatile memory capable of writing only one time. There are one using a floating gate type nonvolatile memory cell and one using a gate insulating film destruction type nonvolatile memory cell in the OTP memories.
Conventionally, there are a lot of OTP memories each using the floating gate type nonvolatile memory cell, but in recent years, the number of OTP memories each using the gate insulating film destruction type nonvolatile memory cell increases because elements are able to be manufactured by a normal CMOS process, and there is no dependence on technology. In the gate insulating film destruction type nonvolatile memory cell, a high voltage is applied on a gate insulating film of a field effect transistor and the gate insulating film is destroyed to thereby enable writing of data.
Besides, an art in which one-bit data is stored into a plurality of nonvolatile memory cells to thereby increase reliability is proposed (for example, refer to Patent Documents 1 to 3). For example, the plurality of nonvolatile memory cells where the same data are written are simultaneously read out, and thereby, it is possible to suppress an occurrence of read failure even when the data is lost caused by deterioration over time or the like at a certain nonvolatile memory cell after the writing of data.
[Patent Document 1] Japanese Laid-open Patent Publication No. 2001-43691
[Patent Document 2] Japanese Laid-open Patent Publication No. 2011-103154
[Patent Document 3] Japanese Laid-open Patent Publication No. 11-96776
For example, in arts described in Patent Document 1 and Patent Document 2, when the one-bit data is stored at the plurality of nonvolatile memory cells, the writings of data are performed for the nonvolatile memory cells one by one, and therefore, a cost for a writing process is large. For example, as it is described in Patent Document 3, the writings of data are simultaneously performed for two nonvolatile memory cells, readings of data are simultaneously performed for the two nonvolatile memory cells, and thereby, it is possible to reduce the cost for the writing process.
In the gate insulating film destruction type nonvolatile memory cell, when the writing of data is insufficient, it is known that deterioration of read current occurs caused by deterioration over time or the like of conductivity of the gate insulating film after destruction. Accordingly, a method in which the writings of data are simultaneously performed and the readings of data are simultaneously performed for two nonvolatile memory cells is applied for the OTP memory using the gate insulating film destruction type nonvolatile memory cell, there is a possibility in which it is determined to be a good product before shipment, but it becomes a bad product after shipment as illustrated in FIG. 8.
FIG. 8 is a view to explain a determination example when writings of data are simultaneously performed and verifications (readings of data) are simultaneously performed for two nonvolatile memory cells MC-A, MC-B. In FIG. 8, in writing, “◯” represents a state in which the data can be sufficiently written, and “x” represents a state in which the data cannot be written (write failure state). Besides, “writing deficiency” represents a state in which the writing of data is insufficient, but a little read current flows at a reading time, and it is a state easy to return to a non-writing state resulting from deterioration over time. It is determined to be the good product (PASS) at a verification time as long as the data can be written to either one of the two nonvolatile memory cells MC-A, MC-B.
Therefore, as illustrated in FIG. 8, it is determined to be the good product (PASS) if one of the two nonvolatile memory cells MC-A, MC-B is in the state of the writing deficiency or the writing failure (case 2 and case 3). There is a possibility that it is determined to be the good product (PASS) as long as the read current for a certain degree is obtained by the two nonvolatile memory cells MC-A, MC-B even if both of the two nonvolatile memory cells MC-A, MC-B are in the states of the writing deficiency (case 4).
In cases of the case 2, case 3, and case 4 illustrated in FIG. 8, a possibility of occurrence of read failure becomes high when deterioration of the read current at the reading time of data occurs resulting from deterioration over time or the like. In particular, in case of the case 4 in which both of the two nonvolatile memory cells MC-A, MC-B are in the states of the writing deficiency, the possibility of occurrence of read failure resulting from deterioration over time becomes very high.